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February 9, 2010

Octasic Announces Second Generation DSP Core

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by Jan Harris

Octasic Inc., a leading innovator of media processing and wireless solutions, today announced its second generation Opus2 DSP core, a high-performance, ultra-low power, asynchronous DSP architecture optimized for baseband processing and multimedia transcoding.

To facilitate customer evaluation of the core, Octasic is making available an integrated development environment with support for multi-standard cellular infrastructure applications.

The Opus2 core, based on Octasic’s unique asynchronous Opus DSP architecture, offers the lowest power consumption available in a fully programmable, high-performance DSP.

Opus2 is code compatible with the currently shipping Opus1 core.

Opus1, the DSP processor used in Octasic’s Vocallo devices, is widely deployed as a media processor in voice and video media gateways for wireline and wireless, session border controllers (SBCs), IPBXs, and as a baseband processor in multi-carrier GSM basestations.

Incorporating the experience gained from extensive application development on Opus1 and improvements to the asynchronous design, Octasic has doubled the platform’s performance, while improving its power efficiency.

For example, a single device based on Opus2 can provide all the necessary processing for a complete 64 user HSPA+/LTE basestation while consuming less than 2.5W.

“For all our customers — whether they are developing media gateway, or wireless basestations — improving both power and performance has become their top priority,” said Robert Blake, CEO of Octasic.

“Opus2 further expands our leadership in developing platforms that provide designers with both the flexibility and scalability to maximize their investment in multi-standard wireless communications.”

Opus2 for Wireless Applications
In addition to basic architecture improvements, Opus2 has been optimized to efficiently support the air interfaces of the existing 2G and 3G standards, as well as the emerging 4G/LTE standards.

Unique instructions to improve power and performance for W/CDMA and OFDMA physical and media access
control (MAC) layer algorithms have been added, including instructions for rate matching, turbo encoding, code generation, equalization, chip rate processing and encryption.

Enhancements have also been made to support a dynamically reconfigurable hardware accelerator, tightly coupled with the Opus2 core, to improve performance and maintain software flexibility for functions such as: Random Access Channel (RACH) search; FFT/DFT; and advanced error correction algorithms, such as turbo decoding and Convolutional Turbo Code (CTC).

“Having an entire wireless product line built on a single programmable architecture can drastically reduce both development costs and product lead times for support of evolving standards,” said Will Strauss, president and principal analyst at Forward Concepts.

“To address the technology and application-driven world in which we live, Octasic has created a flexible
platform with longevity that can scale for technology iterations yet to come.”

Opus2 is fully supported by a rich highly integrated software development environment that includes an optimizing C compiler and timing accurate simulator.

Opus2 based devices will be available from Octasic later this year, for use in: wireless baseband, media gateway, PBX, and Video products.

“Given the breadth of its capabilities, coupled with its low power and small silicon requirements, the Opus2 is ideally suited to create scalable solutions that meet the design challenges of low cost residential femtocell
as well as the high performance requirements of a multi-standard macro BTS,” said Emmanuel Gresset, Octasic’s vice president of software defined radio.

“We have worked hard to ensure our customers can develop superior products for a wide range of applications on a unified DSP architecture from voice to video to baseband.”

For wireless developers looking for high-performance, low-power solutions for 3G applications, Octasic will demonstrate an integrated reference platform with partners Continuous Computing and Analog Devices Inc. at Mobile World Congress, February 15-18, in Barcelona, Spain, in the Canadian Pavilion, Stand 2A97.

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